IntroductionIn this tutorial we will make this display:
This circuit, which may seem complex at first glance, is in fact very simple and is composed of the following elements
- A clock
- A storage memory (content to display) and its driver
- A shift register
- A display
Important: many features like the /db command and the cut and paste tool are only available in creative mode, which will be used in this tutorial.
The clock is an extremely simple circuit where we loop a series of ‘identity’ gates. An input allows to start the clock. The number of identity gates defines the frequency of the clock.
Important: the clock must be connected to a ‘readonly’ circuit, i.e. you must not ‘consume’ the signal and therefore connect its output to an orange input.
The pattern to display is stored in a small ROM of 8 bytes, which allows us to chain a pattern that will make up to 8 lines.
Here we display the following pattern:
XX X X X X X X X X X X X X XX
This corresponds, in binary, to:
00011000 00100100 01000010 10000001 10000001 01000010 00100100 00011000
And in hexadecimal:
18 24 42 81 81 42 24 18
The associated datablocks can be generated under the cursor with the following command:
/db -h 1824 4281 8142 2418
All that remains is to arrange them in the right order with the cut and paste tool so that our ‘8-byte ROM Reader’ can read the data:
1 2 3 4
Our ROM reader allows us to get the data of a complete line, but for that we have to give it the address of the line we want to read (between 0 and 7 included).
So we can’t just plug in our clock, which only generates a sequence of 1 and 0…
A component exists to generate a sequence from 0 to N: the ‘counter’.
You just have to put a datablock underneath to define the value N (here 7), and the counter will generate our sequence from 0 to 7 at each clock change.
For more information, please refer to the counters page.
It is now possible to finish the module that will contain the pattern data and the clock. To do this we chain the clock to the counter, and the counter to our ROM.
We can check that the module works well by connecting it to the first line of a display.
The rest of our display just shows the previous lines. At each tick we want to memorize for each segment the state of the segment above.
The type of memory required for this type of application is a SIPO (Serial In - Parallel Out) shift register.
Building this kind of memory is simple. You just need to place JK Flip Flops in cascade if you want to store binary states, and if you want to store 8-bit data then you will use memory blocks instead.
Example of a shift register using JK Flip Flops.
Our display requires 8 bits per line, so we will chain memory blocks.
Here the only real difficulty is to compress the shift register as much as possible.
You also have to be careful that the first line is well synchronized with the ones below, which is not the case in the example video above.
A simple way to correct the problem is not to use the ROM output directly for the first line of the display, but to give it as input to the shift register.